It is known in the art to provide a semiconductor device having a master-slave flip-flop circuit.
The master-slave flip-flop circuit is a storage circuit having a master latch circuit which receives and latches a data signal in synchronism with a clock signal and a slave latch circuit which receives and latches the data signal from the master latch circuit in synchronism with a clock signal.
For example, a semiconductor device such as a central processing unit stores bit information using a master-slave flip-flop circuit. Then, using a flip-flop circuit set constructed by arranging a plurality of such master-slave flip-flop circuits, a bit set of a plurality of bits is formed and one word of information is thus stored.
With the trend toward higher integration levels of circuit elements forming semiconductor devices, the operating voltage of the circuit elements has been decreasing, giving rise to the problem that the stored bit information may be destroyed due to a soft error. A soft error is a phenomenon in which electron-hole pairs are generated by energetic particles such as a-particles or neutrons impinging on circuit elements and the bit information is destroyed by the generated carriers. Decreasing operating voltage of the circuit elements makes the stored bit information more susceptible to soft errors.
To address the above problem, a semiconductor device, such as a central processing unit, detects the occurrence of an error due to a soft error or the like by using one-bit parity information appended to the bit set that forms one word of information.
Japanese Laid-open Patent Publication No. 2007-80945
Japanese Laid-open Patent Publication No. 1-287944
Japanese Laid-open Patent Publication No. 2006-196841
If an error occurs in one of the plurality of stored bits forming one word of information, it is possible to detect that an error has occurred in one of the bits by using the above-described parity bit.
However, if an error occurs simultaneously in two or an even number of bits among the plurality of stored bits forming one word of information, it is not possible with one-bit parity information to detect that an error has occurred in the one word of information.
To prevent the occurrence of soft errors, it is proposed, for example, to provide a device isolation layer between two master-slave flip-flip circuits, but the provision of such a device isolation layer involves the problem that the device area increases.